Computer Architecture

J. R. Barker, J. Beeley, F. Rodriguez, D. Azemoon, S. Roy

Our research interests include:

  • Development of DC hypermesh parallel computer
  • Application of small worlds theory to computer architectures
  • Development of minimal logic adaptive autonomous roving robotics
  • Development of simulation schemes for massively parallel computers
  • Development of simulators for single-electron (SET) systems
  • Development of architectures for molecular computers
  • Wireless networks for autonomous robotics

A 4 X 4 processor hypermesh

Selected Publications

F. Rodriguez-Salazar, J. R. Barker
Hamming hypermeshes: high performance interconnection networks for pin-out limited systems
Performance Evaluation, 63 , 759-775 (2006).

Hilbert graph: an expandable interconnection for clusters
F.Rodriguez-Salazar and J.R. Barker
J.Computational Electronics, 4, 145-8 (2005)

F. Rodriguez-Salazar, J. R. Barker
Linear Feedback Shift Register Interconnection Networks
in Proceedings of the 2004 Workshop on Massively Parallel Processing, at IPDPS 2004 (2004).

Development of a distributed crossbar switch hypermesh parallel computer,
J. Beeley, J. R. Barker and S. Roy,
IEE Research in Electronics and Photonics, ISBN 0863413218,
IEE Press: London, pp1-6 (2000).

Architectures for nanostructured devices
L.A.Akers, J.R. Barker, L. Mckenzie
Proceedings of the Int.Conf. on Quantum Devices and Circuits,World Scientific: Imperial College Press , 283-288 (1997)

Molecular electronic logic and architectures
Barker J R,
in Introduction to Molecular Electronics edited by M Petty, D. Bloor and M. Bryce; Edward Arnold: London , Chapter 16, 345-376 (1995).

Speed-up of Scalable Iterative Linear Solvers Implemented on an array of transputers,
Asenov, A., Reid D, Barker J R,
Parallel Computing, 20, 669 – 682 (1995).

Barker, J.R., A. Asenov, A.R. Brown, J. Cluckie, S. Babiker and C.R. Atrokianathan,
Parallel Simulation of Semiconductor Devices,
in Massively Parallel Processing, Applications and Development, Dds. L. Dekker, W. Smith, J.C. Zuidervaart, Elsevier, 683 – 690 (1994)

Asenov, A., D. Reid and J. R. Barker,
The Implementation and Speed-up of Coloured SOR Methods Solving 3D Problems on Array of Transputers,

in Transputer Applications and Systems, ’93, Eds. R. Grebe, J. Hector, S. C. Hilton, M. R. Jane, P. H. Welch, 1, 578-587 (1993)

S. Roy, J.R. Barker, A. Asenov
System Simulation Tools for Single Electronic Devices
Proceedings of the 2nd International Workshop on Computational Electronics (IWCE-2), Leeds, UK, Leeds University, ed C. Snowden, 275-279, (1993).


Comments are closed.